A vertical MOSFET (a metaloxide semiconductor field effect transistor) is known as a switching device that uses a silicon carbide (hereinafter, referred to as “SiC”) substrate (see, e.g., Patent Document 1 below). In the vertical MOSFET in Patent Document 1 below, a p-type SiC layer is deposited to be a base region on an n+-type SiC substrate that is a drift region. Inside the p-type SiC layer, an n+-type source region, and an n-type region penetrating the p-type SiC layer in the depth direction and connected to the n+-type SiC substrate are selectively formed away from each other. A gate electrode is formed through a gate insulating film, on the surface of a portion between the n+-type source region and the n-type region of the p-type SiC layer.
Patent Document 1: Published Japanese-Translation of PCT Application, Publication No. 2004-036655